# AI/ML Algorithms and Applications in VLSI Design and Technology

**Authors:** Deepthi Amuru, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Andleeb Zahra, Zia Abbas  
**arXiv:** [2202.10015](https://arxiv.org/abs/2202.10015)  
**Date:** 2022-02-21  
**Summary page:** https://www.summarizepaper.com/en/paper/2202.10015v2/

## Key points

- Overview of AI/ML algorithms in VLSI design and manufacturing:
- Addressing challenges in the nanometer regime
- Enhancing CAD tools' capabilities
- Circuit modeling
- System-on-chip (SoC) design
- Physical design strategies like lithography and reliability analysis
- Yield prediction and management
- Testing methodologies
- Learning strategies for complex data-intensive tasks using AI/ML algorithms:
- SVM-based macro models for characterizing transistor stacks of CMOS gates
- Digital circuit optimization frameworks utilizing ResNet-based approaches
- Future opportunities and challenges for incorporating AI/ML technologies in VLSI design and manufacturing:
- Enhancing IC yield rates
- Reducing manufacturing turnaround times

## Summary

This comprehensive review paper explores the use of Artificial Intelligence (AI) and Machine Learning (ML) algorithms in Very-Large-Scale Integration (VLSI) design and manufacturing. It addresses the challenges faced by the integrated circuit (IC) industry in the nanometer regime, particularly in reducing design complexity and minimizing chip manufacturing turnaround time. The paper provides an overview of existing literature on AI/ML algorithms for VLSI design and emphasizes their necessity and scope in enhancing CAD tools' capabilities. It systematically delves into different aspects of AI/ML applications at various abstraction levels, including circuit modeling, system-on-chip (SoC) design, physical design strategies like lithography and reliability analysis, yield prediction and management, as well as testing methodologies. The paper also discusses learning strategies proposed for handling complex data-intensive tasks using AI/ML algorithms. It highlights specific studies such as SVM-based macro models for characterizing transistor stacks of CMOS gates and digital circuit optimization frameworks utilizing ResNet-based approaches. In conclusion, this paper not only provides a detailed survey of existing AI/ML automated approaches but also outlines future opportunities and challenges for incorporating these advanced technologies to revolutionize VLSI design and manufacturing processes. By effectively leveraging AI/ML algorithms across different abstraction levels, it aims to enhance IC yield rates while reducing manufacturing turnaround times significantly.
